ISC 2020 Research Papers
PLEASE NOTE: The Call for Research Papers is closed!
The ISC research paper sessions provide world-class opportunities for engineers and scientists in academia, industry and government to present and discuss issues, trends and results that will shape the future of high performance computing (HPC), Networking, Storage and AI/Machine Learning.
Research Papers Chair |
Saday Sadayappan, University of Utah and Pacific Northwest National Laboratory |
Research Papers Deputy Chair |
Brad Chamberlain, CRAY |
Proceedings Chair |
Guido Juckeland, Helmholtz-Zentrum Dresden-Rossendorf |
Proceedings Deputy Chair |
Hatem Ltaief, KAUST |
From all Research Papers submitted to the conference, the ISC 2020 Research Papers Committee, which is headed by Prof. Saday Sadayappan, University of Utah and Pacific Northwest National Laboratory, USA, with Brad Chamberlain, CRAY, USA, as Deputy Chair, has selected the following Research Papers for presentation at ISC High Performance 2020:
Monday, June 22
Research Paper Award Session
- Hans Meuer Award Finalist 1: Load-balancing Parallel Relational Algebra
- Hans Meuer Award Finalist 2: Time Series Mining at Petascale Performance
- GCS Award Winning Paper: tba
Research Paper Session - Machine Learning / Big Data
- HyPar-Flow: Exploiting MPI and Keras for Scalable Hybrid-Parallel DNN Training with TensorFlow
- Opportunities for Cost Savings with In-transit Visualization
- Semi-automatic Assessment of I/O Behavior by Inspecting the Individual Client-Node Timelines — An Explorative Study on 10^6 obs
- Predicting Job Power Consumption Based on RJMS Submission Data in HPC Systems
Tuesday, June 23
Research Paper Session - Accelerators
- Using High-Level Synthesis to Implement the Matrix-Vector Product on FPGA
- FASTHash: FPGA-based High Throughput Parallel Hash Table
- Enabling Execution of a Legacy CFD Mini Application on Accelerators Using OpenMP
Research Paper Session - Architecture
- SHARP Streaming-Aggregation Hardware Design and Evaluation
- Embedding Algorithms for Quantum Annealers with Chimera and Pegasus Connection Topologies
- Communication-Aware Hardware-Assisted MPI Overlap Engine
Research Paper Session - Programming / Scheduling for Hybrid Memory Systems
- Pattern-Aware Staging for Hybrid Memory Systems
- Desynchronization and Wave Pattern Formation in MPI-Parallel and Hybrid Memory-Bound Programs
- Footprint-Aware Power Capping for Hybrid Memory Based Systems
Research Paper Session - Parallel Programming Models
- Shared-Memory Parallel Probabilistic GraphicalModeling Optimization: Comparison of Threads,OpenMP, and Data-Parallel Primitives
- Simplifying Communication Overlap in OpenSHMEM Through Integrated User-Level Thread Scheduling
Wednesday, June 24
Research Paper Session - Performance
- Understanding HPC Benchmark Performance on Intel Broadwell and Cascade Lake Processors
- Offsite Autotuning Approach - Performance Model Driven Autotuning Applied to Parallel Explicit ODE Methods
- Timemory: Modular Performance Analysis for HPC
Research Paper Session - Linear Algebra
- DGEMM using Tensor Cores, and Its Accurate and Reproducible Versions
- Sparse Linear Algebra on AMD and NVIDIA GPUs -- The Race is on
- Solving Acoustic Boundary Integral Equations Using High Performance Tile Low-Rank LU Factorization
Research Paper Session - Fault-Tolerance / Resilience
- TeaMPI—Replication-based Resilience without the (Performance) Pain
- Evaluating the Performance of Global-Restart Recovery For MPI Fault Tolerance
Research Paper Session - Scalable Applications
- Scaling Genomics Data Processing with Memory-Driven Computing to Accelerate Computational Biology
- Running a Pre-Exascale, Geographically Distributed, Multi-Cloud Scientific Simulation
PLEASE NOTE: The Call for Research Papers is closed!
Submitted research paper proposals will be reviewed by the ISC 2020 Research Papers Committee, which is headed by Prof. Saday Sadayappan, University of Utah and Pacific Northwest National Laboratory, USA, with Brad Chamberlain, CRAY, USA, as Deputy Chair.
The ISC organizers as well as the German Gauss Center for Supercomputing will again sponsor the call for research papers with two awards for outstanding research papers: the Hans Meuer Award and the GCS Award. Each accepted paper will be considered for the awards.
The Hans Meuer Award and the GCS Award winner will receive a cash prize of 5,000 Euros each.
Important Dates
Full Submission Deadline |
closed |
Author Rebuttals |
January 22 - January 25, 2020 |
Notification of Acceptance |
February 5, 2020 |
Camera-Ready Submission |
April 17, 2020 |
Research Paper Sessions |
June 22 - June 24, 2020 |
Final Presentation Slides in PDF due |
June 26, 2020 |
Areas of Interest
The Research Papers Committee encourages the submission of high-quality papers reporting original work in theoretical, experimental, and industrial research and development. The ISC submission process will be divided into eight tracks this year.
Architectures, Networks & Infrastructure |
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Data, Storage & Visualization |
- Future design concepts of HPC systems
- Multi-core & many-core systems
- Heterogeneous systems
- Other paradigms (including data flow computing, FPGAs, etc.)
- Network technology
- Domain-specific architectures
- Memory technologies
- Trends in the HPC chip market
- Exascale computing
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- From big data to smart data
- Memory systems for HPC & big data
- File systems & tape libraries
- Data-intensive applications
- Databases
- Visual analytics
- In-situ analytics
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HPC Applications |
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HPC Algorithms |
- Highly scalable applications
- Convergence of simulations & big data
- Scalability on future architectures
- Workflow management
- Coupled simulations
- Industrial simulations
- Implementations on GPUs & other accelerators
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- Innovative algorithms, discrete or continuous
- Algorithmic-based fault tolerance
- Communication-reducing & synchronization-reducing algorithms
- Time-space trade-offs in algorithms
- Energy-efficient algorithms
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Programming Models & Systems Software |
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Artificial Intelligence & Machine Learning |
- Parallel programming paradigms
- Tools and libraries for performance & productivity
- Job management
- Monitoring & administration tools
- Productivity improvement
- Power & energy management & scheduling
- Resilience
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- Neural networks & HPC
- Machine learning & HPC
- AI & machine learning-oriented hardware
- Devising benchmarks for machine learning
- Use cases
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Performance Modeling & Measurement |
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Emerging Technologies |
- Performance models
- Performance prediction & engineering
- Performance measurement
- Power consumption
- Energy measurement & modelling
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- Quantum computing architecture
- Software for quantum computing
- Quantum algorithms
- Quantum annealing
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Note: Submissions on other innovative aspects of high performance computing are also welcome. You will be asked to pick a primary and a secondary track from the eight above for your submission.
Submission & Review Process
Submission (The Call for Research Papers is closed!)
Guidelines
Only accepted style: LNCS style (Springer’s website)
- Single column format
- Maximum 18 pages (including figures and references)
- LaTeX document class OR Word template
- Suitable for anonymous review
- Incorrectly formatted papers will be excluded
It's allowed to put papers on ArXiv before submitting to ISC.
Review
- Minimum 4 reviewers
- Double-blind peer-review (see ISC High Performance Double-Blind Review Guidelines)
- Criteria: novelty, fundamental insights and potential for long-term contribution
Rebuttal phase (January 22-25, 2020)
- Chance to respond to reviewer comments
- Clarify misunderstandings
- Written format
- Authors receive instructions via email
Final decision (February 05, 2020)
- Consideration of reviews and rebuttals
- Discussion at research paper committee meeting
- Notification of authors
Terms & Conditions
- By submitting a paper, you agree to present the paper at ISC 2020 in Frankfurt, Germany.
- The research paper sessions will be held from Monday, June 22 through Wednesday, June 24, 2020. Attendance will require a Conference Pass. Paper presenters need to be registered ISC 2020 participants.
- The ISC organizers will grant a 100% discount on the conference day pass to one presenter per paper for the day of their presentation.
- Travel, accommodation, registration fees and other such costs will not be covered by the ISC organizers.
The publication of the papers is managed by Proceedings Chair Guido Juckeland, Helmholtz-Zentrum Dresden-Rossendorf with Hatem Ltaief , KAUST, as Proceedings Deputy Chair.
OPEN ACCESS PUBLICATION

All accepted research papers will be published in the Springer‘s Lecture Notes in Computer Science (LNCS] series in Gold Open Access.
Gold OA makes the final version of a research paper freely and permanently accessible for everyone, immediately after publication. Paper submissions are required to be within 18 pages in LNCS style. For the camera-ready version, authors are automatically granted one extra page to incorporate reviewer comments.
Volumes published as part of the LNCS series are made available to the following indexing services: Conference Proceedings Citation Index (CPCI), part of Clarivate Analytics’ Web of Science, EI Engineering Index (Compendex and Inspec databases), ACM Digital Library, DBLP, Google Scholar, IO-Port, MathSciNet, Scopus, Zentralblatt MATH.]
PRESENTATION SLIDES FOR ATTENDEES
The ISC organizers will make the presentation slides available online a week after the event, provided as PDF files. ISC 2020 attendees will receive an e-mail with the access link.
- Jeff Hammond, NVIDIA, Finland (Chair)
- Amanda Randles, Duke University, United States of America (Deputy Chair)
Algorithms, Methods & Tuning
- Hatem Ltaief, KAUST, Saudi Arabia (Chair)
- Ahmad Abdelfattah, University of Tennessee, United States of America
- Sameh Abdulah, KAUST, Saudi Arabia
- Qinglei Cao, Saint Louis University, United States of America
- Kate Clark, NVIDIA, United States of America
- Aimad Er-Raiy, Airbus, France
- Aniello Esposito, HPE, Switzerland
- Huda Ibeid, Intel, United States of America
- Mathias Jacquelin, Cerebras Systems, United States of America
- Kamer Kaya, Sabancı University, Turkey
- Xinhua Lin, Shanghai Jiao Tong University, China
- Lena Oden, Fernuniversität in Hagen, Forschungszentrum Jülich GMBH, Germany
- Jesmin Jahan Tithi, INTEL CORP, Intel, United States of America
- Miwako Tsuji, RIKEN, AHUG, Japan
- Ichitaro Yamazaki, Sandia National Laboratories, United States of America
Applications & Use Cases
- Bronson Messer, Oak Ridge National Laboratory, United States of America (Chair)
- Reuben Budiardja, Oak Ridge National Laboratory, United States of America
- Peter Coveney, UCL, University of Amsterdam, United Kingdom
- Anshu Dubey, Argonne National Laboratory, University of Chicago, United States of America
- Ian Karlin, NVIDIA, United States of America
- Christopher Knight, Argonne National Laboratory, United States of America
- Nicholas Malaya, AMD, United States of America
- Bronson Messer, Oak Ridge National Laboratory, United States of America
- Ramesh Pankajakshan, Lawrence Livermore National Lab, United States of America
- Scott Parker, Argonne Leadership Computing Facility, United States of America
- Markus Rampp, Max Planck Computing & Data Facility, Germany
- Christine Simpson, Argonne Leadership Computing Facility, United States of America
- Tjerk Straatsma, ORNL, United States of America
Machine Learning & AI
- Sofia Vallecorsa, CERN, Switzerland (Chair)
- Vishakha Agrawal, SiFive, United States of America
- Maxwell Cai, Intel, Leiden University, Netherlands
- Renato Cardoso, CERN, Switzerland
- Adel Chaibi, Intel, France
- Nadya Chernyavskaya, Predictive Layer, Switzerland
- Nikoli Dryden, Lawrence Livermore National Laboratory, United States of America
- Tobias Grosser, University of Edinburgh, United Kingdom
- Pratik Jawahar, University of Manchester, France
- Vladimir Loncar, MIT, United States of America
- Lukasz Miroslaw, Microsoft, Switzerland
- Diana Moise, Cray, HPE, Switzerland
- Bogdan Nicolae, Argonne National Laboratory, United States of America
- David Ojika, University of Florida, United States of America
- Piyush Raikwar, CERN, Switzerland
- Vikram A. Saletore, Intel Corporation, United States of America
- AMARJIT SINGH, RIKEN, Japan
- Edgar Solomonik, University of Illinois at Urbana-Champaign, United States of America
- Mudhakar Srivatsa, IBM, United States of America
- Kyongmin Yeo, IBM, United States of America
Programming Environments & System Software
- Tom Deakin, University of Bristol, United Kingdom (Chair)
- Sunita Chandrasekaran, University of Delaware, United States of America
- Biagio Cosenza, University of Salerno, Italy
- Johannes Doerfert, Lawrence Livermore National Laboratory, United States of America
- Yehia Elkhatib, University of Glasgow, United Kingdom
- Bilel Hadri, KAUST Supercomputing Laboratory, Saudi Arabia
- Georg Hager, University of Erlangen-Nuremberg, Erlangen Regional Computing Center, Germany
- Guido Juckeland, Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Germany
- Pekka Jääskeläinen, Tampere University, Intel Finland Oy, Finland
- Pouya Kousha, The Ohio State University, United States of America
- John Linford, NVIDIA, United States of America
- Glenn Lockwood, Microsoft Corporation, United States of America
- James Richings, Edinburgh Parallel Computing Centre (EPCC), United Kingdom
- Roxana Rusitoru, Arm, United Kingdom
- Sameer Shende, University of Oregon; ParaTools, Inc., United States of America
- Osman Seckin Simsek, University of Basel, Switzerland
Quantum Computing
- Stefan Knecht, AlgorithmiQ, Finland (Chair)
- Ayush Asthana, University of north dakota, United States of America
- Werner Dobrautz, Chalmers University of Technology, Sweden
- Luigi Iapichino, Leibniz Supercomputing Centre, Germany
- Jeanette Lorenz, Fraunhofer Institute for Cognitive Systems IKS, LMU Munich, Germany
- Stefano Mensa, The Hartree Centre, STFC, United Kingdom
- Stephan P. A. Sauer, University of Copenhagen, Denmark
- Francesco Tacchino, IBM Research Zürich, Switzerland
- Ivano Tavernelli, IBM, Swaziland
- Phillip Wagner Kastberg Jensen, University of Copenhagen, Denmark
System Architecture & Hardware Components
- Samantika Sury, Samsung Semiconductor Incorporated, United States of America (Chair)
- Eric Borch, Samsung, United States of America
- Aditya Deshpande, Samsung Semiconductor Inc., United States of America
- David D. Donofrio, Tactical Computing Laboratories, United States of America
- Jayesh Iyer, Esperanto Technologies, United States of America
- Nikhil Jain, NVIDIA, United States of America
- Stefan Knecht, AlgorithmiQ, Finland
- Kalyan Kumaran, Argonne National Laboratory, United States of America
- Divya Prasad, AMD, United States of America
- Roxana Rusitoru, Arm, United Kingdom
- Jaehoon Yu, SAIT, South Korea