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Greetings, and welcome to a brand new year that brings new opportunities!

 

Over the multi-year campaign to move from petascale HPC to the first generation of exascale systems, we have seen a slowdown in the performance growth rate of systems across the board. Whereas in the past we have become used to a cadence of 10-11 years for each 1000x improvement in LINPACK measured performance, the new projections plot a growth rate of 10x every ten years as measured by LINPACK. The slowdown of Moore’s Law, as we have known it for the past 50 plus years, is real!

But that is why this coming year’s discussion at ISC will be so exciting because change is afoot. The US and the EU have both launched their microelectronics industry efforts to create a path to a *new* Moore’s Law through architectural innovations, advanced packaging (3D integration, and chiplets, for example), innovative replacements for CMOS transistors, and other technology innovations in photonics, alternative models of computation, along with the software technologies and mathematical reasoning that come with them. There will be so many exciting directions to discuss with this world-class crowd of innovators and problem solvers at ISC.

So rather than regard this development with trepidation and concern, we should embrace these changes as a new opportunity for technology innovation for HPC and the broader electronics markets. It is a new opportunity for clever design to renew and rejuvenate the HPC ecosystem.

 

So, I hope to see all of you, our HPC family, in person and online at ISC in Hamburg, Germany, this May. Let us greet the future of HPC with excitement and a sense of wonder.